While there are many tutorials on building operating systems, there are none on building microkernels. This is somewhat of an ambitious attempt to fill that gap. We will implement a simple microkernel with extremely fast IPC, not being shy to resort to assembly code if we must. The platform we will be targetting is the RISC-V virt platform on QEMU. RISC-V and a virtual platform should keep things simple enough for us. If we get time, we can also cover porting this code to support other platforms as well.
; boot.S file.option push.option norelaxla gp, _global_pointer.option pop
In RISC-V cores are referred to as HART, in our boot file we will setup HART 0 and put the rest of the HARTs to sleep.
# SATP should be zero, but let's make sure. Each HART has its own# SATP register.csrw satp, zero # Any hardware threads (hart) that are not bootstrapping# need to wait for an IPIcsrr t0, mhartidbnez t0, 4f